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1/12 july 2001 n high speed : f max = 79 mhz (typ.) at v cc = 6v n low power dissipation: i cc =4 m a(max.) at t a =25c n high noise immunity: v nih = v nil = 28 % v cc (min.) n symmetrical output impedance: |i oh | = i ol = 4ma (min) n balanced propagation delays: t plh @ t phl n wide operating voltage range: v cc (opr) = 2v to 6v n pin and function compatible with 74 series 390 description the m74hc390 is an high speed cmos dual decade counter fabricated with silicon gate c 2 mos technology. this dual decade counter contains two independent ripple carry counters. each counter is composed of a divide by two and divide by five counter. the divide by two and divide by five counters can be cascaded to form dual decade, dual biquinary, or various combination up to a single divide by 100 counter. each 4-bit counter is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. when clear is set low all four bits of each counter are set to low. this enables count truncation and allows the implementation of divide by n counter configuration. all inputs are equipped with protection circuits against static discharge and transient excess voltage. m74hc390 dual decade counter pin connection and iec logic symbols order codes package tube t & r dip m74hc390b1r sop M74HC390M1R m74hc390rm13tr tssop m74hc390ttr tssop dip sop
m74hc390 2/12 input and output equivalent circuit pin description truth table * : output qa is connected to input clock b for bcd count. ** : output qd is connected to input clock a for bi-quinary count. pin no symbol name and function 1, 15 1 clock a 2 clock b clock input divide by 2 section (high to low edge-triggered) 2, 14 1 clear 2 clear asynchronous master reset inputs 3, 5, 6, 7 1qa to 1qd flip flop outputs 4, 12 1 clock a 2 clock b clock input divide by 5 section (high to low edge-triggered) 13, 11, 10, 9 2qa to 2qd flip flop outputs 8 gnd ground (0v) 16 vcc positive supply voltage count outputs bcd count* bi-quinary** qd qc qb qa qa qd qc qb 0 llllllll 1 lllhlllh 2 llhlllhl 3 llhhllhh 4 lhlllhll 5 lhlhhhll 6 lhhlhllh 7 lhhhhlhl 8 hlllhlhh 9hllhhhll inputs outputs clock a clock b clear qa qb qc qd xxhllll x l binary count up x l quinary count up
m74hc390 3/12 block diagram logic diagram this logic diagram has not be used to estimate propagation delays
m74hc390 4/12 timing chart absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi ons is not implied (*) 500mw at 65 c; derate to 300mw by 10mw/ c from 65 c to 85 c symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 50 ma p d power dissipation 500(*) mw t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c
m74hc390 5/12 recommended operating conditions dc specifications symbol parameter value unit v cc supply voltage 2 to 6 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c t r , t f input rise and fall time v cc = 2.0v 0 to 1000 ns v cc = 4.5v 0 to 500 ns v cc = 6.0v 0 to 400 ns symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. v ih high level input voltage 2.0 1.5 1.5 1.5 v 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 v il low level input voltage 2.0 0.5 0.5 0.5 v 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 v oh high level output voltage 2.0 i o =-20 m a 1.9 2.0 1.9 1.9 v 4.5 i o =-20 m a 4.4 4.5 4.4 4.4 6.0 i o =-20 m a 5.9 6.0 5.9 5.9 4.5 i o =-4.0 ma 4.18 4.31 4.13 4.10 6.0 i o =-5.2 ma 5.68 5.8 5.63 5.60 v ol low level output voltage 2.0 i o =20 m a 0.0 0.1 0.1 0.1 v 4.5 i o =20 m a 0.0 0.1 0.1 0.1 6.0 i o =20 m a 0.0 0.1 0.1 0.1 4.5 i o =4.0 ma 0.17 0.26 0.33 0.40 6.0 i o =5.2 ma 0.18 0.26 0.33 0.40 i i input leakage current 6.0 v i = v cc or gnd 0.1 1 1 m a i cc quiescent supply current 6.0 v i = v cc or gnd 44080 m a
m74hc390 6/12 ac electrical characteristics (c l = 50 pf, input t r = t f = 6ns) capacitive characteristics 1) c pd is defined as the value of the ics internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) = c pd x v cc x f in + i cc symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. t tlh t thl output transition time 2.0 30 75 95 110 ns 4.5 8151922 6.0 7131619 t plh t phl propagation delay time (clock a - qa) 2.0 42 120 150 180 ns 4.5 14 24 30 36 6.0 12 20 26 31 t plh t phl propagation delay time (clock a-qb,qd ) 2.0 45 120 150 180 ns 4.5 15 24 30 36 6.0 13 20 26 31 t plh t phl propagation delay time (clock a - qc) 2.0 qa connected to ckb 108 280 350 420 ns 4.5 36 56 70 84 6.0 31 48 60 71 t plh t phl propagation delay time (clock b - qc) 2.0 72 185 230 280 ns 4.5 24 37 46 56 6.0 20 31 39 48 t phl propagation delay time (clear - qn) 2.0 45 125 155 190 ns 4.5 15 25 31 38 6.0 13 21 26 32 f max maximum clock frequency (clock a - qa) 2.0 8.4 17 6.8 5.6 mhz 4.5 42 65 34 28 6.0 50 79 40 33 f max maximum clock frequency (clock b - qb) 2.0 8.4 17 6.8 5.6 mhz 4.5 42 67 34 28 6.0 50 79 40 33 t w(h) t w(l) minimum pulse width (clock ) 2.0 24 75 95 110 ns 4.5 6151922 6.0 5131619 t w(h) minimum pulse width (clear) 2.0 24 75 95 110 ns 4.5 6151922 6.0 5131619 t rem minimum removal time 2.0 25 30 35 ns 4.5 5 6 7 6.0 5 5 6 symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. c in input capacitance 5101010pf c pd power dissipation capacitance (note 1) 84 pf
m74hc390 7/12 test circuit c l = 50pf or equivalent (includes jig and probe capacitance) r t = z out of pulse generator (typically 50 w ) waveform 1: clock waveform (f=1mhz; 50% duty cycle)
m74hc390 8/12 waveform 2 :propagation delay times, minimum pulse width and removal time (f=1mhz; 50% duty cycle)
m74hc390 9/12 dim. mm. inch min. typ max. min. typ. max. a1 0.51 0.020 b 0.77 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 d 20 0.787 e 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 f 7.1 0.280 i 5.1 0.201 l 3.3 0.130 z 1.27 0.050 plastic dip-16 (0.25) mechanical data p001c
m74hc390 10/12 dim. mm. inch min. typ max. min. typ. max. a 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.019 c1 45 (typ.) d 9.8 10 0.385 0.393 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 f 3.8 4.0 0.149 0.157 g 4.6 5.3 0.181 0.208 l 0.5 1.27 0.019 0.050 m 0.62 0.024 s8 (max.) so-16 mechanical data po13h
m74hc390 11/12 dim. mm. inch min. typ max. min. typ. max. a 1.2 0.047 a1 0.05 0.15 0.002 0.004 0.006 a2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 d 4.9 5 5.1 0.193 0.197 0.201 e 6.2 6.4 6.6 0.244 0.252 0.260 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0 80 8 l 0.45 0.60 0.75 0.018 0.024 0.030 tssop16 mechanical data c e b a2 a e1 d 1 pin 1 identification a1 l k e 0080338d
m74hc390 12/12 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2001 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco singapore - spain - sweden - switzerland - united kingdom ? http://www.st.com

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